DMA file transfer

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

DMA file transfer

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Folks,

I have designed a Core(HDL) which needs to compute on a huge data stored on an external memory. I am planning to use DMA to transfer a chunk of data at a time from SDRAM to on-chip. Here are my questions:

1. Almost all the design examples I saw use nios to facilitate the file transfer operation. Is it not possible to generate the DMA control signals from my core and control/schedule the transfer? Which one will have higher performance?

2. I know how to build such hardware using Qsys/SOPC but I Iack resources on how to develop the SW part, if I end up using nios. Can someone point me to a documentation/link with example programs showing DMA based file transfer?

Thanks,

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