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Debug Help (System ID mismatch, System timestamp mismatch)

Altera_Forum
Honored Contributor II
‎04-16-2012 07:00 AM
4,828 Views

Hello everybody, 

 

This is my first post on this forum, so please bear with me... I am trying to debug, but I am receiving the following errors in the 'Target Connection' tab. 

 

System ID mismatch - connected: "0x23a8d24a", expected: "0x45a57fc4" 

 

System timestamp mismatch - connected: "1331177017", expected: "1334558592" 

 

I have a tiny bit of experience with all of this, so let me tell you what I have tried so far. Basically, I tried to redo everything. I went into Quartus and used the SOPC builder to generate a new SOPC file. While there, I made a note of the system ID and system timestamp and verified that these values matched those in the .sopcinfo file. They did. 

 

Then, I went to Nios II and redid the BSP. No errors there... I went and looked in the system.h file and verified that the timestamp in there matched the system timestamp I noted earlier. 

 

I rebuilt everything and then I tried to enter debug mode and that was when I saw the errors. The expected values always match the ones that I noted while in the SOPC builder, but the connected ones never change. 

 

Why is this, and how can I fix it? 

 

Thanks!
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Altera_Forum
Honored Contributor II
‎04-16-2012 08:04 AM
3,067 Views

after you generate the SOPC system you need to go into Quartus, compile the project, and upload the new .sof file into the FPGA (be careful, if you don't have the licenses for all the IPs you are using, then the project is compiled into a *_time_limited.sof, so be sure you are using the right one). Then it should pass the system ID/timestamp test.

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Altera_Forum
Honored Contributor II
‎06-05-2012 12:17 PM
3,067 Views

Yes, this fixed it, thanks for your help!

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