Honored Contributor II
09-28-2015 11:57 AM
dears, I've created a small NIOS II design for MAX10 (10M08 with ADC) where I want to debug the software.When I download combined POF file including FPGA configuration (SOF) and Software the design is working. But when I try to load software from within Eclipse it fails with "ELF download process failed", and in the console window it says that verification has failed. I found an issue in the knowledge base telling that the CPU data master must be connected to all the memories which is the case. My application shall execute from the UFM (reset vector is set to onchip flash, and exception vectors to onchip RAM). In AN-730 I read that in this case hardware breakpoints must be used because the UFM doesn't support random access. But the NIOS II/e configuration doesn't support them so tried with NIOS II/f, and 2 hardware breakpoints, but problem remains the same. Is it not possible to debug an application running from flash (debugging in on-chip RAM works btw.), or did I miss something?