MAX10 dual boot, NIOS2 boot from UFM. Not booting.

Altera_Forum · ‎06-23-2016

Hello,

I have an issue with a MAX10 (max 10 FPGA Development Kit). I am trying to boot from UFM with a dual boot component in my QSYS System but nothing happens on reset and after programming.

For me it looks like the cpu is not booting because the rest of the design is working.

No erros so far in QSYS, QUARTUS and NIOS2 SBT tool but when i reset nothing happens. I use JTAG for configuration.

Now i tried to read the UFM with a program written in the NIOS2 SBT and when i press debug the program i stored in UFM starts running before the new program is written into the RAM. Flow: Press debug->old program executes -> console tells me that the programm is written onto the FPGA -> new program executes.

I used: https://www.altera.com/en_us/pdfs/literature/an/an730.pdf.

I tried boot option one and two with the same results. I generated the .hex files with build target and mem_init_generate

The program stored in the UFM is a simple program where a led starts to blink.

For boot option one i took the following settings:

My QSYS setup is: clock source (50 MHz from the board), NIOS2 porcessor (f) - reset vector to lowest address on-chip-flash - exception vector to on-chip-ram, JTAG UART, on-chip ram (16384), altera dual boot configuration, onchip_flash (all Sectors are set to write and read) init default and use external init file, PIO (Parallel I/0) with width one..

In eclipse i made following settings in the BSP editor:

enable_small_c_library

enable_reduced_device_drivers

and i checked everthing in hal.linker

i set the .text to on_chip_flash

Here is the code i wrote in eclipse (yeah the alt_printf prints one time but i want to try that for now)

# include "sys/alt_stdio.h"
# include "altera_avalon_pio_regs.h"# include "system.h"
enum States {
    MENU, ERROR,
    ERASE_CFM0, WAIT_ERASE_CFM0, WRITE_CFM0, CONFIG_SEL_CFM0, RECONFIGURE_CFM0,
    ERASE_CFM1, WAIT_ERASE_CFM1, WRITE_CFM1,
    ERASE_CFM2, WAIT_ERASE_CFM2, WRITE_CFM2, CONFIG_SEL_CFM12, RECONFIGURE_CFM12
};
int main()
{
    //--------- Variables -----------------
    enum States state = MENU;
    //-------------- Begin ----------------
    alt_printf("You are connected to a Max10 device loaded with the golden_RSU image!\n\n\n");
    while (state != ERROR){
        IOWR_ALTERA_AVALON_PIO_DATA(PIO_ENABLE_LED_DRIVER_BASE,1); //enables the nios2_led_driver
        switch (state){
        case MENU: //Prompt selection
            alt_printf("Enter 1,2,3 or 4 to select the operation:\n");
            break;
        default:
            //nothing
            break;
        }
    }
    return 0;
}

In quartus i added a .sdc file where i derive the clock uncertainty and i made a Signaltap analyzer file.

In the programmer under tools->option i checked the initiate configuration after programming box but same result.

Would be great if someone can point out my mistake.

Altera_Forum · ‎06-24-2016

I never used UFM Megafunction, nor MAX10.

Anyway, did you check on MegaWizard Plug-In Manager if settings are properly configured ?

https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/an/an489.pdf

ASidd16 · ‎07-10-2020

Hello Did you find the solution, i'm also getting the same problem