Hi all,
I have a low bitrate serial data coming in (e.g. 200kbps)..This serial data link is encoded using Miller encoding. I am trying to implement a decoder within a FPGA device (Cyclone II or similar). Can someone suggest a good algorithm/FSM to perform the decoding to recover the original data?
To my understanding is that since my bitrate is very low, I shouldn't be too worried about jitter, therefore my problem is how to align my clock (let's say this clock is generated from a local oscillator and divided down) to the data.
Any suggestion/recommendation is more than welcomed.
E
