Design files for Application Note AN367

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

Design files for Application Note AN367

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Hi,

There is application note < AN 367: Implementing PLL Reconfiguration in Stratix II Devices > available at:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an367.pdf

Page 31 mentions that there is a design example #3 titled < Implementing Phase Shift Stepping Using the ALTPLL_RECONFIG Design with Write Parameters>.

I can’t find the files for that design example.

Can you provide us the files or the link to download them?

Thanks

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