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Design not Fitting in LogicLock Regions

Altera_Forum
Honored Contributor II
‎08-25-2010 03:38 PM
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Hi. I am having a trouble with LogicLock Regions. 

 

I compile the Design first with the LogicLock Regions, set to Auto and Floating. 

Then once it fits correctly. I change it to Fixed.. and start again.. 

 

This Time Quartus says that the Region is too small to fit the design into it. 

How can this be true? if it was Quartus the one who determine the size of it on the previous Run? 

 

has any one had this kind of problem? 

 

Thankyou!
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Altera_Forum
Honored Contributor II
‎08-25-2010 03:59 PM
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is your region's location the same as when Quartus placed it? a column of DSP blocks will leave you with fewer LEs, for example 

 

if everything checks out i would open a service request and file a bug report. in the mean time can you increase the size of the region slightly to get it to fit?
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