Double Data Rate Source Synchronous Constraint

[Altera_Forum]

Hi. 

 May i know how to decide to use the same edge captured(center aligned) or opposite edge captured(center aligned) in double data rate source synchronous ?   When i perform timing analysis, there are failing path for same edge captured. On the contrary, there is no faling path for opposite edge capture.   Does it really matter on the edge i chose since it does not affect the operation of hardware?   FYI, i am referring to the AN 477. The way you use Set_false_path will determine which edge you are going to chose.   Thanks

[Altera_Forum]

Use whichever suits your timing closure. Same edge latching needs extra constraints (multicycle) while opposite edge latching does not apart from selecting the right edge combinations. 

By adding multicycle to the same edge latching it becomes equivalent to opposite edge case due to wrap-up.

[Altera_Forum]

set_false_path does NOT tell TimeQuest if you're doing same-edge or opposite-edge capture. All it does is tell TQ not to analyze the capture not being used. I tell users not to do the false path at all, because it only cuts timing on the paths that meet timing easily(in your case, you would want to cut timing on the opposite edge captures that make timing, which doesn't help that your failing timign.) The reason I recommend against it is that it doesn't help, but if you erroneously cut timing on the same edge capture, you'd make timing but your interface would fail. 

Multicycles are what should be used to change the capture edge.