Drive pins to ground instead of using real ground

[Altera_Forum]

Hi, 

 this might seem like a stupid question but I dare to ask. :) I have an external peripheral device which I need to connect to a Stratix 5 GX FPGA via an FMC add-on card. The add-on card has a lot of debug connectors but the problem is that it has very few ground pins which are not very conveniently located. Lets assume that I need to connect a flat ribbon cable from the external periphery to one of the connectors which has every second signal connected to ground to improve signal integrity.  Is it viable that I drive those pins to ground from the FPGA side instead of using the "native" ground pins of the add-on card?  Jan

[Altera_Forum]

No. When an FPGA drives to "ground" its not really, its driving an output low. 

 Think about what you are asking a little bit more; your adapter card sends a single-ended signal over to the FPGA, and the signal return current returns via the ground pins.  If you had no ground pins at all on your connector, and only had FPGA pins. Driving some of the pins to logic low, does not create a "ground" connection.  You need to connect the "reference plane" on both boards together, i.e., the grounds.  The return current from your signal over the cable will not route through the FPGA and then out the pins that are driving logic low.  You can also think of this in terms of current; the FPGA output is low, due to the fact its sinking current on the I/O pin through the low CMOS gate to ground. If your signal return path current needs to take this path, then the current needs to go through the FPGA I/O pin in the wrong direction.  Cheers, Dave

[Altera_Forum]

--- Quote Start ---  If your signal return path current needs to take this path, then the current needs to go through the FPGA I/O pin in the wrong direction.  --- Quote End ---   There's no "wrong direction" for a CMOS output stage.   Of course the return current will create a voltage drop across the output transistor and also ground bounce according to its dI/dt. In so far it's not a perfect ground. But in terms of signal integrity of the ribbon cable still better than nothing.

[Altera_Forum]

--- Quote Start ---  There's no "wrong direction" for a CMOS output stage.   --- Quote End ---   True, otherwise we would not have BusSwitch components. However, the explanation was intended as a "thought exercise" to aid in understanding, eg., that the return signal current needed to travel in the wrong direction relative to the CMOS driver logic low current path (which was the intended current path for that CMOS gate).    --- Quote Start ---  Of course the return current will create a voltage drop across the output transistor and also ground bounce according to its dI/dt. In so far it's not a perfect ground. But in terms of signal integrity of the ribbon cable still better than nothing.  --- Quote End ---   Do you really think this would work?   If the two ground planes on the two boards were not connected, and the cable ground pins were all connected to logic low signals from the FPGA, you'd have a bunch of drivers driving a common ground (the cable and external board), this would not cause a "driver conflict", since they're all driving ground. All the return currents from signals going from the board to the FPGA would return through various paths to the FPGA logic level low outputs.  The "ground" connection would probably be pretty noisy, but I guess it might work ... its not something I'd want to use for anything other than a quick hack though!  Cheers, Dave

[Altera_Forum]

Still don't understand what should be the implication of the said "wrong direction". But of course that's not the main point. 

 I presume there are some cable wires connected to real ground so that power supply and DC voltage drop are no issues.   The key words in my previous post are howvere "better than nothing". If it actually works depends on many details that can't be exactly predicted from the rather general problem description. I would set maximum drive strength for ground pins and low drive strength for signal pins to improve the signal integrity.