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Let's say I'm instantiating an on-chip FIFO memory core in SOPC builder, and I want this to be a "array of arrays". (Does this make sense), and if so, is this feasible?
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FIFOs can not be accessed the way arrays can be (i.e. you can not access any location, it has to be like first in first out). So you can not use FIFO as a array so there is no question of array of arrays! Please correct me if I have misunderstood your question.
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I'm aware of that fact :) My question deals more with the memory aspect. The analog in C would be a fifo whose elements are pointers to arrays.
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So you may instatiate a FIFO in order to save your pointers in it, and the FIFO output will be connected to the read_address of a RAM (or ROM if needed) which will be filled with your arrays. Is this a suitable solution for you?
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So basically, the FIFO elements should be memory addresses?
(And) would it make sense to be using malloc while doing the C programming in Nios II?- Mark as New
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The FIFO cells are physically implemented in the FPGA RAM blocks but its cells are never addressable in a one-by-one fashion like in a RAM, you can only write to the last address and read from the first one.
Once you have physically created you RAM interface in your design, you ar free to use the ANSI C function to allocate your memory.- Mark as New
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Sorry, I forgot to answer to your first question. Yes, the FIFO contents would be memory addresses.

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