ECC in SDRAM Controller -> how to disable?

[Altera_Forum]

Hi All, 

 how can I disable the ECC in the SDRAM Controller in HPS in ArriaV?  The only option, which I see is the Total Interface Width, which is currently set to 40 (the intention was 32 bits for data and 8 bits for ECC).   So, if I set the Total Interface Width to 32, will it automatically disable the ECC option?   Thank you

[Altera_Forum]

not not mistaken, 

as long as not at below setting the ECC won't kick in  SDRAM Interface The SDRAM interface is up to 40 bits wide and can accommodate 8-bit, 16-bit, 16-bit plus ECC, 32-bit, or 32-bit plus ECC configurations, depending on the device package. The SDRAM interface supports LPDDR2, DDR2, and DDR3 memory protocols.