Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
21615 Discussions

EDA Netist Writer was unsuccessful

Altera_Forum
Honored Contributor II
‎06-09-2016 04:37 AM
1,203 Views

Running on a sp13.01 Web Edition, I tried to compile a VHDL code doe a simple 4-bits counter. Although the compilation was successful, but when I wanted to simulate, a message showed EDA Netlist Writer was unsuccessful with 0 error and 0 warning! 

 

 

Any idea about that message. 

 

Thanks 

 

Ma.
0 Kudos

Link Copied

0 Replies
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.