EP2C8 start-up problem

[Altera_Forum]

Hello 

 I have a board with an EP2C8 that displays a strange problem when loaded with a certain application.   When I apply power to the device, nothing happens - but the minute I connect my programmer (ByteBlaster II) the device starts working as expected (I do not have to download anything to the device, or even have Quartus installed or running - but ByteBlaster drivers are required). After it has started I can remove the programmer and it keeps going until I cut power.   When I load other configurations into the device it starts without any problem so I don't think it is a hardware problem.   Do you have any suggestions?

[Altera_Forum]

could you please post a schematic of your board that shows everything around the jtag connector and the signals between jtag connector and FPGA (resistors ...)

[Altera_Forum]

Hi, 

I experienced same on some of my Cyclone and CycloneII boards. Everytime this happened, some programmings and "manual starts" later the board (in fact the FPGA) died completely. I did exchange the FPGA on some boards and the EEPROM was not affected - board operated. I think there is something with the nConfig signal, perhaps the additional resistors in the Programmer "helps to activate" the configuration process. Second thing is, that this problem occurred only on boards where I programmed my EPCS with just connecting the USB-Blaster w/o disconnecting power first. On boards the programmer is connected with the power (of the to be programmed unit) been shut-off first, I did not observe this (and I did also a lot of reprogramming on "those boards"). Maybe there is a ESD problem as there are different voltages on the USB Blaster (or programmer) interface referenced to PC "GND" and the boards power supply.  For the Cyclone III there is an Application Note referring the protection diodes. I also came across an article suggesting the Programmer interface's GND line first...  Carlhermann

[Altera_Forum]

sensei, 

This sounds like some sort of control signal polarity or a power rail problem. Connecting the ByteBlaster will should put a definite value on the nCS, nCE, and nCONFIG signals that might be fixing a polarity problem. Compare you circuitry against the circuit diagram in the Device Handbook.    Otherwise check to see whether the power rails are rising to "recommended operating conditions" within the POR (Power On Reset) timing requirement.   If that fails, you may like to go through Altera's new "Configuration Troubleshooter" to cover all of the basics. Just search on "FPGA Configuration Troubleshooter". Sorry, I can't post links yet.  Regards and good luck, Mike

[Altera_Forum]

--- Quote Start ---  could you please post a schematic of your board that shows everything around the jtag connector and the signals between jtag connector and FPGA (resistors ...)  --- Quote End ---     Sorry for the late reply, I've been a bit under the weather for a cpl days.   This is the schematic:   http :// www . fpga4u . com / estore / support / CII_V6 / schematic / CII_V6.pdf   Sorry about the link, I'm not allowed to post linkes because "To be able to post links or images your post count must be 5 or greater."   Just remove the spaces   Thanks

[Altera_Forum]

--- Quote Start ---  sensei, This sounds like some sort of control signal polarity or a power rail problem. Connecting the ByteBlaster will should put a definite value on the nCS, nCE, and nCONFIG signals that might be fixing a polarity problem. Compare you circuitry against the circuit diagram in the Device Handbook.    --- Quote End ---     I read on another post titled "Stratix II Configuration Problem" in this forum with a similar problem. The author found that disabling compressed bitstreams worked to resolve his/her issue.   I tried this on my board and now it starts up without any problems.   Problem is that I can just barely fit my design now, and I want to expand on it in the future. Does anyone have any idea WHY this would work? Seems odd to me, I mean compressed bitstreams should not affect how the programming pins are handled should it?   //TG

[Altera_Forum]

replace resistor r1 10k with a 0 ohm resistor. 

you have nCE connected to GND via this 10K resistor, and when you plug in the blaster, this nCE pin will be tied to GND and enabling the configuration. when no blaster is conected, this input pin is connected via this high value resistor to GND and that should be the reason for your problem. have a look here http://www.altera.com/literature/hb/cyc2/cyc2_cii51013.pdf (http://www.altera.com/literature/hb/cyc2/cyc2_cii51013.pdf) On page 8 nCE is connected directly to GND On page 55 you will see those information for combining JTAG and AS mode

[Altera_Forum]

Thank you very much MSchmitt! 

 I will try this as soon as my configuration outgrows the onboard config. mem (may take a few weeks).   This is not my design, it's a prefab board I got from a chinese manufacturer. Seems they have made a few mistakes with this board. Had to remove a resistor to get JTAG running at all prior to finding this issue.   Anyways, thanks again - will let you know if this solves the problem.