EPM CPLD's Internal Osc Frequency

[Altera_Forum]

Hi! 

 I'm working with a EPM570 and need a clock source.  I created it with the block ALTUFM_OSC, set the frequency to 5.5 MHz and checked it worked by simulating the circuit.  As stated in the help file of ALTUFM_OSC, the frequency of 5.5 MHz I've selected it's only "for simulation purpouses and has no impact on the on-chip oscillator frequency".  My question is, what will be the real frequency of the oscillator when I upload the source code to the CPLD? Is it uncertain and will be between 3.3 and 5.5 MHz?  If it's really uncertain and I need a deterministic frequency for the global clock, how can I interface a crystal into the CPLDs pins?  It may have been asked before, but I had no luck finding the answers.  Thanks in advance for your help.

[Altera_Forum]

The frequency wont be reliable and will vary with temperature. According to the documentation it will only be in the range you specify though.

[Altera_Forum]

p43 says the real frequency can be between 3.33MHz and 5.56MHz 

 http://www.altera.com/literature/ug/ug_alt_ufm.pdf  Rather than trying to build an oscillator circuit using a crystal, just use an oscillator.  http://www.ecliptek.com/ http://www.ecliptek.com/oscillators/ec26/  Route the output of the oscillator to the clock pin of the CPLD.  Cheers, Dave

[Altera_Forum]

Thanks a lot for your help Dave and Tricky! 

 Didn't know there are crystal oscillators with TTL/CMOS output.  Bye!