Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21611 Discussions

EPM3064ALC44 Open-Drain Issues

Altera_Forum
Honored Contributor II
‎02-19-2010 08:29 PM
1,685 Views

Hello, 

 

According to the MAX3000A data sheet, page 21, this device is capable of open-drain operation with a pull-up resistor to 5V, thus being able to interface the 3.3V 3064 to 5.0V CMOS devices. 

 

However when comiling the design in Quartus, there is no 5.0VCMOS option in the pin assignment editor. There does not seem to be an open drain option available. 

 

Does anyone have experience with using 3064's in open-drain operation? How do you configure the device to operate so? 

 

Thanks!
0 Kudos

Link Copied

2 Replies
Altera_Forum
Honored Contributor II
‎02-19-2010 10:11 PM
473 Views

take a look at posts# 2 and# 3 on this thread: 

 

http://www.alteraforum.com/forum/showthread.php?t=5617
0 Kudos
Copy link
Altera_Forum
Honored Contributor II
‎02-20-2010 11:00 AM
473 Views

Thanks pancake, that works. :)

0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.