Embedded SFL not working

[Altera_Forum]

Hello, 

 I finally tried to throw light on a Serial Flash Loader issue, I experienced since long. I'm rather surprized, that Altera support seems to have never heard of a similar problem. Thus I wanted to ask, if no one saw it before?  The setup is very simple, I have a design with an embedded SFL instance. It's able to program AS configuration memory through JTAG during user mode, the same way as the factory provided SFL images do. Don't need to discuss the purpose of embedding SFL into the design in this place.  When I include another JTAG function as Source&Probe or SignalTap in the design, SFL operation fails with error: can't recognize silicon id. I see, that the AS chip select isn't operated during programming attempt, while DCLK and ASDO are still working.  To anticipate a possible suggestion, the problem seems not to be related to dual-purpose pin settings in Device Options, particularly, it doesn't help to set all pins to regular user I/O, as recommended for the Nios EPCS controller.  The problem is also different from an error no sfl ip in the design.  The problem has been found with Cyclone II and Cyclone III, and is present at least since Quartus V7.1.  Best regards, Frank

[Altera_Forum]

A short update.  

 Altera support is now asking the software team, "whether this is a bug or a dedicated restriction in QII programmer".  Meanwhile, I did some additional tests and could see, why SFL fails. Briefly, it's because the Quartus programmer doesnt't operate the SFL Virtual JTAG function correctly. It's using wrong address bits and/or wrong VIR length (behaviour is different depending on the order of VJTAG instances in the design, but never correct, unfortunately).  The SFL function itself can apparently coexist with other Virtual JTAG functions, I was able to read the AS Silicon ID through SFL, using correct virtual JTAG instructions generated by quartus_stp tcl commands.  I expect, that the bug can be fixed almost easily by applying small corrections to Quartus Programmer.  Best regards, Frank

[Altera_Forum]

Hi FvM 

 Did you find a solution for this?  I'm running into the same issue here at the moment with Quartus 8.1...  Best regards, emanuel

[Altera_Forum]

Hello Emanuel, 

 as I stated in my previous post, it seems to be a bug in Quartus Programmer code rather than SFL MegaFunction. Altera support is looking after the issue, but I don't expect an answer this year. For the time being, I use factory default SFL image for AS programming.  Best regards, Frank

[Altera_Forum]

Hi Frank, 

 sorry, I'm kind of confused at the moment. I took your join date for the message date and thought that you wrote that one year ago... *patsch*  Thanks for the answer, everything clear. I'll wait for more Altera updates...  Best regards, emanuel

[Altera_Forum]

I just realized, that I had reported a similar Quartus Programmer problem with PFL MegaFunction and Source & Probe using MAX II. It had been fixed at least with V8.1, probably already V8.0.

[Altera_Forum]

Altera support confirmed the bug and said, it shall be fixed with Quartus V9.0, around march 09.

[Altera_Forum]

Ok, thanks a lot for the update! 

Always feels like Christmas, waiting for the next software version, where everything is fixed.