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Good morning,
I am currently trying to configure my Altera stratixIII development board with my ".sof" file that containes my SoC design. I am currently using the NIOSII command shell with the command "nios2-configure-sof". What I want is to configure the device using the JTAG protocol and the USB-Blaster programming cable. I changed the switch SW1 so that to set FPGA_BYPASS and MAX_ENABLE to '1'. Unfortunately, I am unable to configure the device and I get the following message: "Error: Can't configure device. Expected JTAG ID code 0x021020DD for device 1, but found JTAG ID code 0x121020DD." It seems that there is a problem with the JTAG ID but only one bit is different. Do you think that it is a problem with one of the connections I made ? Do you have an idea to solve this problem ? Many thanks, AlexisLink Copied
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It looks like you have selected the wrong device in Quartus.
0x121020DD is the code for a EP3SL150, but you have compiled for a EP3SL150ES.- Mark as New
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Actually, I do not select the device since it is already defined in the "sof file".
The device which is selected is: EP3SL150F1152 What I do not understand is the fact that it works correctly when I use the same sof file on my colleague's computer.
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