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Hi, I'm simulating IP with modelsim. got problem as title. can someone please help me?
error message below
# Top level modules:
# ADC
# End time: 22:55:47 on Jan 26,2022, Elapsed time: 0:00:01
# Errors: 0, Warnings: 0
# reading C:/intelFPGA_lite/16.1/modelsim_ase/win32aloem/../modelsim.ini
# Model Technology ModelSim - Intel FPGA Edition vlog 10.5b Compiler 2016.10 Oct 5 2016
# Start time: 22:55:47 on Jan 26,2022
# vlog -reportprogress 300 -vlog01compat -work work ADC_modular_adc_0.v
# ** Error: (vlog-66) Execution of vlib.exe failed. Please check the error log for more details.
# End time: 22:55:47 on Jan 26,2022, Elapsed time: 0:00:00
# Errors: 1, Warnings: 0
# ** Error: C:/intelFPGA_lite/16.1/modelsim_ase/win32aloem/vlog failed.
# Error in macro ./ADC/simulation/mentor/mentor.do line 34
# C:/intelFPGA_lite/16.1/modelsim_ase/win32aloem/vlog failed.
# while executing
# "vlog -vlog01compat -work work ADC_modular_adc_0.v"
thanks.
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Hi,
I am Farabi who will be supporting your request.
from error message, there is : ./ADC/simulation/mentor/mentor.do line 34
can you share whats written at line 34?
and : "vlog -vlog01compat -work work ADC_modular_adc_0.v"
can you share the files?
regards,
Farabi
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Hello,
Can you refer to this tutorial: https://www.youtube.com/watch?v=6UscboZ1Vho
This tutorial will guide you on how to perform ADC simulation and no error during compile.
regards,
Farabi
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Hi,
We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.
regards,
Farabi
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