External core clock input (J70, J71) ALTERA stratix v gt

[Altera_Forum]

Hello all, 

could someone please explain what is the function of a fpga's core clock and the respective "external core clock input" SMAs? Can i connect these SMAs to 10MHz reference of an external device? Many thanks in advance..

[Altera_Forum]

This external core clock input can be used to drive the core logic. Depending on the reference clock frequency required by your core, then you feed the required frequency to the SMAs.

[Altera_Forum]

--- Quote Start ---  Hello all, could someone please explain what is the function of a fpga's core clock and the respective "external core clock input" SMAs? Can i connect these SMAs to 10MHz reference of an external device? Many thanks in advance..  --- Quote End ---    Hi evanchat,  The stratix v gt development board should have two built in oscillators ready which cover frequency of 25, 50, 100, 125 and 200 MHz. You can check "General-Purpose Clocks" section in the board reference manual for further details. Generally only if these frequency cannot meet your logic requirement, then only you use the external core clock input.

[Altera_Forum]

Thank very much both of you. If i understood it well, the core clock can be used as clock to my design logic just like the four dedicated transceiver clocks are used as a reference clock to any transceiver phy block in my design, right? 

And another question, related in some way with my first question, is there a 10MHz reference on the board so as to to synchronize with other lab equipment. In the board reference manual i didn't notice anything... So, i have to create this clock from a transmitter for example.

[Altera_Forum]

--- Quote Start ---  Thank very much both of you. If i understood it well, the core clock can be used as clock to my design logic just like the four dedicated transceiver clocks are used as a reference clock to any transceiver phy block in my design, right? And another question, related in some way with my first question, is there a 10MHz reference on the board so as to to synchronize with other lab equipment. In the board reference manual i didn't notice anything... So, i have to create this clock from a transmitter for example.  --- Quote End ---    You are welcome. Yes, you are right, the core clock can be used as clock to your design logic.  As for your latest question, as I understand it, there is no 10MHz clock source on the board. However, you may try to use core PLL to derive the 10MHz from the existing clock source. You can check this implementation with Quartus II compilation.

[Altera_Forum]

Thank you I'll check it!