Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
21615 Discussions

FPGA dual-port RAM read/write speed

Altera_Forum
Honored Contributor II
‎02-25-2015 04:33 AM
1,259 Views

If we create a dua port RAM baed on EP3C55U484, what is the maximum read/write speed? 

 

Regards, 

xxlnm
0 Kudos

Link Copied

2 Replies
Altera_Forum
Honored Contributor II
‎02-25-2015 12:22 PM
552 Views

See Table 1-22 "Cyclone III Devices Memory Block Performance Specifications" in the datasheet.

0 Kudos
Copy link
Altera_Forum
Honored Contributor II
‎02-25-2015 08:10 PM
552 Views

 

--- Quote Start ---  

See Table 1-22 "Cyclone III Devices Memory Block Performance Specifications" in the datasheet. 

--- Quote End ---  

 

 

Thanks a lot. 

 

xxlnm
0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.