Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21611 Discussions

FPGA read data from HPS DDR3

Altera_Forum
Honored Contributor II
1,108 Views

Hello, I'm using DE1-SoC and my project was to use the SDRAM on the FPGA and just send frames from HPS to the SDRAM controller, read it using Frame Reader VIP component and everything worked well. But I'm wondering whether it is possible to read the data from the HPS DDR3, not the FPGA SDRAM, so have the Frame Reader access the memory on Linux and read the frames from there. I thought about connecting the frame reader to f2h_axi_slave directly, then the axi slave span is 0x00000000 - 0xffffffff, so I believe that if now I tried to access and map the HPS SDRAM that starts at offset 0x0010_0000 I should map the proper part of memory in the software side and that's all? 

 

Actually I'm not sure if this is the right thing and if the FPGA is somehow able to get data in that way, because there are many examples on how to send data from HPS to FPGA and from FPGA to HPS but not much about reading. Has anyone tried to accomplish what I want to do? 

 

Regards
0 Kudos
0 Replies
Reply