Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21584 Discussions

FPGA reconfiguration time

Altera_Forum
Honored Contributor II
1,819 Views

Hi Every one, 

 

Is there any calculation regarding FPGA reconfiguration. When nconfig is pulled low for more than 500nsec and then release, reconfiguration will be initiated. But I couldn't able locate a method to know that what time it will take to reconfigure from serial configuration EPCS device (EPCS16S18N). Kindly help me.  

 

Thanks, 

Rajkumar
0 Kudos
3 Replies
Altera_Forum
Honored Contributor II
687 Views

Too long :-) 

It depends on the amount of data to be loaded and the actual speed on the on-chip oscilator. 

There are some threads about failing to configure the fpga within the PCIe reset 'window' that give some indications of actual times.
0 Kudos
Altera_Forum
Honored Contributor II
687 Views

Accepted, it will be too long but how much. Say I have 1MB pof, internal oscillator is 40MHz. I am looking for calculations, please provide if any available.  

 

Thank you,  

Rajkumar
0 Kudos
Altera_Forum
Honored Contributor II
687 Views

 

--- Quote Start ---  

 

Say I have 1MB pof, internal oscillator is 40MHz. I am looking for calculations, please provide if any available.  

 

--- Quote End ---  

 

The data sheet for the device and the configuration device generally has these calculations already. Essentially it is the .rbf file (not the .pof) length divided by the worst-case AS-mode clock frequency (or 33MHz typical). 

 

Cheers, 

Dave
0 Kudos
Reply