FPS and PS

[Altera_Forum]

Hi,all 

we use Arria II fpga.we can not program arria II with FPS or FPPmode.but can program the fpga with PS correctly.  what's differences between FPS and PS(standard)?  Is it about POR time? I want to know if ArriaII need POR time after soft reset (DEV_CLRn). Or ArriaII need POR time just power up?  thank you !

[Altera_Forum]

Arria II GX does not support the notion of "Fast Passive Serial" configuration. There is only one configuration speed (Passive Serial). However, I see from the datasheet that the MSEL pin settings determine the POR delay time.  

   --- Quote Start ---  Here is what the Arria II GX handbook has to say regarding POR: POR circuitry is important to ensure that all the circuits in the Arria II GX device are at  certain known states during power up. You can select the POR signal pulse width  between fast POR time or standard POR time using the MSEL pin settings. For fast  POR time, the POR signal pulse width is set to 4 ms for the power supplies to ramp up  to full rail. For standard POR time, the POR signal pulse width is set to 100 ms for the  power supplies to ramp up to full rail. In both cases, you can extend the POR time  with an external component to assert the nSTATUS pin low.  --- Quote End ---    Jake

[Altera_Forum]

Thank you very much! 

Does not Arria II GX support the notion of "Fast Passive Serial" configuration? We see the table 9-2 in ArriaII GX handbook.

[Altera_Forum]

There is only one speed for Passive Serial configuration. The "fast" applies only to the POR delay. 

 Jake

[Altera_Forum]

Thank you! 

And can you tell me what's the frequency in the refclk(for example pin_ae29)in ArriaII?

[Altera_Forum]

--- Quote Start ---  can you tell me what's the frequency in the refclk(for example pin_ae29)in ArriaII?  --- Quote End ---   Depends on the implemented interface standard. For a PCIe interface, it would be connected to the PCIe reference clock (125 MHz) from the bus connector, in other cases to a local clock source. I think, the GXB part in the Arria II handbook tells about reference clock requirements for specific high speed interface standards.