Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21094 Discussions

Facing issues during HDL conversion of DSP builder design.

Dhruv1
Beginner
627 Views

Hey guys, 

I'm student of IIT Roorkee(INDIA). I was facing the same error while simulating either the demo design or the design which was created by me using  DSP builder blocksets in MATLAB.  I'll attach some files   for your reference. Basically what we've to do is that to convert  the design(prepared by DSP builder blockset in MATLAB) into HDL code. But we are facing the same error for each and every design for which we try to get HDL code. 

we use Altera DE2-115 board.

0 Kudos
1 Reply
Jeffrey_C_Intel
Employee
594 Views

Hello.  It appears as though the instance you are running might not have been started using the dsp_builder.bat startup script.  This points MATLAB to DSP Builder libraries.  You should have a "DSP Builder" menu across the top of your simulink model if started correctly.  Does not appear to be the case in your screenshot.

- Make sure DSP Builder was installed correctly (after both Quartus and MATLAB installations exist - and target a valid MATLAB installation)

- Start DSP Builder from the Start Menu in windows - i.e. "DSP Builder - Start in MATLAB R2013a" under the Quartus installation

If you don't start it this way, MATLAB/Simulink does not have any awareness of DSP Builder resources - which appears to be the case.

Hopefully this helps.

0 Kudos
Reply