Faulty Cyclone II FPGAs

[Altera_Forum]

We have a board utilising a Nios II/f in a Cyclone 2 FPGA which was designed 4 years ago. Up until recently the production boards have worked fine however over the last 6 months we are seeing a significant number of boards which are failing. The firmware running on them hangs either at start-up or at any point within 2 weeks of been powered up. We are looking at a failure rate of abut 30% in a quantity of 250 boards. For every identified failed board, the board manufacturer replaces the FPGA and the problem goes away. Right now they can’t explain the root cause, they have looked closely at their manufacturing processes and supply chain and everything seems in order. Debugging the running software, on the faulty boards the registered exception handler is being triggered with a misaligned target PC cause ( nios2_exception_misaligned_target_pc = 7).  

  Has anybody experienced similar? Or have any other comments or suggestions?    Thanks in advance     Adrian

[Altera_Forum]

We have a (near) identical scenario here - an old, well proven design (shipping for approx 6 years), that has started failing recently. Our trouble only occurs as low temperatures on, about, 1 in 40-50 units. Our trouble is on a interface between an Altera Aria II GX device and a X!Lynx device (forgive the swearing). Our manufacturer took to changing the later, cheaper part, in a bid to fix the problem. More often than not this works. 

 However, the problem became serious enough for it to be referred back to engineering. We found that the interface between the two devices had been poorly constrained. It had clearly been thoroughly considered - the interface in question was constrained. However, we found the values used to be poorly thought through. This meant that edge case devices, whose timing wasn't tight enough at low temperatures, started causing the problems. However, the FPGA tools had deemed the fit appropriate against the constraints used.  With 6 or so years more experience since then, the rtl blocks at each end of the link have moved on greatly - they're still used in newer designs. So, we've ended up releasing new FPGA images, incorporating the newer rtl, for both designs. The constaints have also been re-visited.  So, it could be a long standing issue you've had waiting to happen. You recently received a batch of edge case devices that are within spec but too near the edge for your design. We did send one of our 'faulty' devices back to the manufacturer. They retested it - it passed.  I hope you get somewhere with it.  Cheers, Alex

[Altera_Forum]

--- Quote Start ---  We have a board utilising a Nios II/f in a Cyclone 2 FPGA which was designed 4 years ago. Up until recently the production boards have worked fine however over the last 6 months we are seeing a significant number of boards which are failing. The firmware running on them hangs either at start-up or at any point within 2 weeks of been powered up. We are looking at a failure rate of abut 30% in a quantity of 250 boards. For every identified failed board, the board manufacturer replaces the FPGA and the problem goes away. Right now they can’t explain the root cause, they have looked closely at their manufacturing processes and supply chain and everything seems in order. Debugging the running software, on the faulty boards the registered exception handler is being triggered with a misaligned target PC cause ( nios2_exception_misaligned_target_pc = 7).    Has anybody experienced similar? Or have any other comments or suggestions?    Thanks in advance     Adrian  --- Quote End ---    Hi,   You might want to constact Altera to investigate on the faulty device since the failure rate seems high.

[Altera_Forum]

You can try to file a service request and request for ERMA to find out the root cause of the failure.

[Altera_Forum]

I agree with Alex, I'd also check for timing problems before blaming the FPGA. Some designs can work fine for ages with a timing problem, and suddenly with a specific batch or specific conditions (temperature, supply voltage) they start failing. Check your timing constraints and all the warnings/errors reported by TimeQuest.