Fitter could not properly route signals from DQ I/Os to DQ capture

[Altera_Forum]

hi all: 

  I got a "critical warning" when i construct ddr2_controller using MegaWizard.     the device is ep3c16f484.    ddr2 controller pin is assigned at the bottom of the fpga.no error.    anyone help!        Critical Warning: Fitter could not properly route signals from DQ I/Os to DQ capture registers because the DQ capture registers are not placed next to their corresponding DQ I/Os  Info: DQ capture register ddr_32:ddr_32_inst|ddr_32_controller_phy:ddr_32_controller_phy_inst|ddr_32_phy:ddr_32_phy_inst|ddr_32_phy_alt_mem_phy:ddr_32_phy_alt_mem_phy_inst|ddr_32_phy_alt_mem_phy_clk_reset:clk|altddio_bidir:DDR_CLK_OUT[0].ddr_clk_out_p|ddio_bidir_e4h:auto_generated|input_cell_h[0] at (30, 27) is not assigned to the adjacent LAB of the corresponding DQ I/O mem_clk[0]~input at (30, 29)

[Altera_Forum]

hi all: 

I generate a ddr2 controller which data wide is 32,then my fpga can connect to two ddr2 sdram.this controller is used to check my fpga pin assignment. no error, but this warning above!