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FAPIOU
Beginner
179 Views

Generate EP3C55F484 Post-Configuation BSDL Model

Hello,

I'm developing JTAG tests for a PWA that uses a FPGA EP3C55F484 LVDS IOs; The standard BSDL model of EP3C55F484 doesn't have the Differential functionality.

I found a document 'BSDL_Files_Generation_in_QII.doc' that explains how to generate using Quartus Altera development SW. I have followed the instruction: After a full compilation with EDA_Tools_Setting and selection of Post-configuration BSDL file, there is no BSDL file generated.

I also found a tutorial on Youtube but for another FPGA family.

I'd appreciate if someone can share his/her experience in generating Post-configuration BSDL file for EP3C55 family device.

Thanks and regards,

Francois APIOU

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2 Replies
Sebastian_M_Intel
Moderator
169 Views

Hello FAPIOU, 

 

Thank you for posting on the Intel® communities. 

 

We would like to inform you that we have a forum for these specific issues and products, so we are moving it to the "Programmable Devices" forum so you can get better support for this matter. 

https://community.intel.com/t5/Programmable-Devices/bd-p/programmable-devices 

 

Best regards, 

 

Sebastian M 

Intel Customer Support Technician 


JohnT_Intel
Employee
159 Views

Hi,


You may refer to https://www.intel.com/content/dam/altera-www/global/en_US/others/download/board-layout-test/bsdl/BSD... in order to generate the post-configuration BSDL file.


Or use TCL file (https://www.intel.com/content/dam/altera-www/global/en_US/others/support/devices/bsdl/Generate_BSDL....) to generate the BSDL file.


If you are still facing issue generating the file, then could you provide me your Quartus report file.


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