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Hi All,
How can I know what pins could be used as the Global, Local, Regional, and Peripheral clocks in the ArriaV device (as an example)? What difference between these clocks? Where to read about (manual/tutorial/userguide)? Thank you!Link Copied
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Hi dmitryl,
As far as I know you can use any pin as global, local, regional or peripheral clock when you use Altera's ATLCLKCTRL IP block. The IP block allows you to "promote" a certain signal to travel over dedicated spines, e.g. the global spine which covers the entire FPGA, or a local clock spine, which covers only certain area of the FGPA etc. Regards, Richard.- Mark as New
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Cannot find the ATLCLKCTRL IP in the IP-Catalog... I'm using the Quartus-II v15.0. Where should I see for this IP? Thank you
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Should I manually insert this IP into my HDL code?
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What's the difference between the Local, Regional, and Peripheral clocks? Are there another clock types (besides Global)?
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Is every device pin/pad has an attached Global Clock Buffer? I had a design where the Fitter went to another rib of the device to pick up a Global Clock buffer there... Why did it do so? How to avoid such route "travelling"?
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Probably the Fitter make such a route to meet timing requirement .
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Read the Clock Networks section of the arria v device handbook (https://www.altera.com/en_us/pdfs/literature/hb/arria-v/av_5v2.pdf). Table 4-1 shows you exactly which pins you should use to access the clock resources available. Avoid specifically instantiating the ALTCLKCTRL IP and let Quartus chose the appropriate resources needed for your design.
Cheers, Alex- Mark as New
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Generally you should only manually assign the clock network type if you have in depth understanding on the clock network and have specific reason ie fanout, timing meeting.
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--- Quote Start --- Hi All, How can I know what pins could be used as the Global, Local, Regional, and Peripheral clocks in the ArriaV device (as an example)? What difference between these clocks? Where to read about (manual/tutorial/userguide)? Thank you! --- Quote End --- what are you trying to do?
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Thanks to all! It was a mistake of a board designer so he connected a clock source to a pin, which was not a dedicated clock pin. As the result, the fitter traveled to far for just picking up a global clock buffer. This travelling was resulted in the setup violations of about 3(!) clock cycles!
It seems I resolved the issue by switching the "Global Signal" pin attribute to OFF. https://www.alteraforum.com/forum/attachment.php?attachmentid=11546- Mark as New
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How can i know what pins in ArriaV might be used as Global or Regional clocks?
In the ArriaV Handbook, in the Table 4-1 (see attached below), there is only mention what the pins are CLK[0..11] and CLK[16..23] for ST devices, but where the pin numbers themselves? Where can I locate the pins (know their pin numbers)? https://www.alteraforum.com/forum/attachment.php?attachmentid=11551- Mark as New
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Look at the appropriate Pin-out file for your device. See pin-out files for altera devices (https://www.altera.com/support/literature/lit-dp.html#arria-v).
Under the Optional Function(s) column, you're looking for the CLK[0..11] pins. Cheers, Alex- Mark as New
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Thanks! As for the CLK[0..11] pins, they are the Global clock pins, are not?
But what pins might be used as the Local, Regional, and Peripheral clock pins? Thank you again- Mark as New
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Yes, they're global. However, you can also access the other resources from them. Refer to table 4-1 in the device handbook (https://www.altera.com/en_us/pdfs/literature/hb/arria-v/av_5v2.pdf) for all the options available.
Cheers, Alex- Mark as New
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--- Quote Start --- Cannot find the ATLCLKCTRL IP in the IP-Catalog... I'm using the Quartus-II v15.0. Where should I see for this IP? Thank you --- Quote End --- Were you able to find this in IP catalogue? I am using Quartus 16.1.2.203 and targeting for Arria 10 device.
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Alternatively, you can manually the clock network selection using Assignment Editor
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