HPS pins timing constraints ?

[rshal2]

Hello,

Is it also possible to set timing constraint for hps pins ?

In all golden examples, I see in sdc file that all hps pins are used with setfalsepath example:

set_false_path -from * -to [get_ports {hps_emac1_TX_CLK}]

So, I am not sure if timing constraint for HPS pins is possible or not.

Thanks,

ranran

[Fawaz_Al-Jubori]

Hello sir,

Timing constraints are possible for HPS interfaces with FPGA only, for example FPGA bridges, I2C masters etc..

For other HPS pins with external connections, lets say GPIO connection with sensor, no need for timing closure. However, you can work on IO standards, Pull-up resistors, drivers strengths etc..

Thank you