Help Needed: Implementing UART and SPI on Altera MAX II EPM240 CPLD

[Thiru_N]

Hi everyone,

I'm currently working with the Altera MAX II EPM240T100C5N CPLD and I'm trying to implement UART and SPI communication protocols on it. I'm using Verilog HDL and targeting a 3.3V logic level for interfacing.

Goals:

• Transmit and receive data using UART (preferably at 9600 baud).

• Interface with SPI peripherals (as SPI master).

• Trigger UART transmission (e.g., send byte 0xAA) every 100µs.

• Ideally get tested and working Verilog code examples for both protocols.

Questions:

1. Is the EPM240T100C5N suitable for implementing UART and SPI protocols purely in Verilog?

2. Are there any working code examples or recommended design practices for:

   • UART Tx and Rx

   • SPI Master

3. Can I reliably generate periodic signals (e.g., 100 µs interval) with the internal resources?

4. Any caveats or issues to watch out for when using these communication protocols on the MAX II CPLD?

My Setup:

• Device: Altera MAX II EPM240T100C5N

• Tools: Quartus II

• HDL: Verilog

• Clock: 50 MHz

• Power: 3.3V

• No onboard PLL

If anyone can share sample Verilog code or tips, that would be extremely helpful!

[ShengN_Intel]

Hi,

For SPI master, you may check this design example https://www.intel.com/content/www/us/en/docs/programmable/683277/current/serial-peripheral-interface-master-in.html

This application note details the implementation of the SPI master in MAX II, MAX V and MAX 10 devices.

Design link: https://www.intel.com/content/www/us/en/design-example/715016/intel-max-10-fpga-an-485-serial-peripheral-interface-master-design-example.html

Will provide the UART part later.

Thanks,

Regards,

Sheng

[Thiru_N]

@ShengN_Intel I have reviewed the links you provided, but I couldn't find any working sample Verilog code for SPI implementation on the MAX II EPM240 CPLD. As I am new to CPLD programming, could you kindly share any resources or sample source code for implementing SPI and UART on this device?

Thanks in advance.

Regards,

Thiru

[ShengN_Intel]

Hi,

The link provided for SPI master on max 10 is SPI master verilog code with no pin assignments which can be implemented on max ii as well check the document note. As for the pin assignment you need to assign based on the max ii pins. We don't have design straight for max ii.

Thanks,

Regards,

Sheng

[ShengN_Intel]

Hi,

Forgot to mention that you need to open the design file AN485_MAX10.par with Quartus version 18.0std then will see the verilog code

[Thiru_N]

@ShengN_Intel 

I’m currently using Quartus II Web Edition and have already tried running that code with it, but I wasn’t able to open the file. I’ll download the software you mentioned and try running the code there.

[Thiru_N]

@ShengN_Intel 

Hi,

I need to transmit and receive data between the MAX II CPLD and a microcontroller or processor. How can this be done using the MAX II? Is it possible to implement protocols like UART, SPI, or I2C in the CPLD, or are there other recommended methods?

[ShengN_Intel]

Hi,

For the uart, we have only uart ip but don't have verilog code design example.

I think you can choose an open source uart verilog code to start with.

For example, I had tested the uart verilog code from this link https://github.com/ben-marshall/uart/tree/master with our uart design example link https://www.intel.com/content/www/us/en/design-example/715139/cyclone-v-fpga-uart-rs-232-maximum-baud-rate-reference-design.html

I had used MAX 10 and replaced the second uart uart_1 with the open source uart verilog code and it works well. Based on the CV_SOC_UART_project\software\software\UART_RXTX\main.c, I had sent data 100, 25, 5, 6 from uart_0 to open source uart verilog code. Open source uart received correctly. Check attached file and screenshot.

I don't have MAX II with me but I think open source uart verilog code should work in MAX II as well.

Thanks,

Regards,

Sheng

[Thiru_N]

Hi, @ShengN_Intel .

I attempted to open the CV_SOC_UART_project using Quartus Prime Standard Edition 18.0. I selected the uart.qpf project file and changed the target device to MAX II EPM240T100C5N. However, when I tried to compile the project, I encountered the following error:

Error (12252): Uart.OCRAM: Selected device family does not support this module.

I also tried to change the device family, but it still lists the MAX II device. Why is this happening? How can I implement UART functionality on the MAX II series?

Is there an alternative method for UART communication on MAX II devices, or is the MAX II no longer supported for such functionality?

I would really appreciate your guidance. Looking forward to your positive response.

[ShengN_Intel]

Hi

Yes, you can implement UART, SPI, and I2C protocols directly in the MAX II CPLD using Verilog or VHDL. The CPLD is well-suited for custom digital logic, including serial communication interfaces.

UART: Implement a UART TX/RX module. Connect the CPLD’s tx and rx pins to the microcontroller’s UART pins.

SPI: Implement SPI master or slave logic in the CPLD. Connect MOSI, MISO, SCLK, and SS pins between the CPLD and microcontroller.

I2C: Implement I2C master or slave logic. Connect SDA and SCL lines.

You can implement those protocols in the MAX II CPLD using HDL. Connect the CPLD’s I/O pins/gpio pins to the microcontroller’s corresponding pins, ensuring voltage compatibility.

[ShengN_Intel]

Hi,

I'm using one of the embedded design to show that the open source uart verilog code is working.

To use uart in MAX II, you can just straight use the uart verilog code in your design. And assign appropriate clock and gpio/IO pins to the clk, tx, rx.

Thanks,

Regards,

Sheng

[ShengN_Intel]

Hi,

Forgot to mention that you need to change device under Device tab.

[Thiru_N]

Hi, @ShengN_Intel .

I attempted to open the CV_SOC_UART_project using Quartus Prime Standard Edition 18.0. I selected the uart.qpf project file and changed the target device to MAX II EPM240T100C5N. However, when I tried to compile the project, I encountered the following error:

Error (12252): Uart.OCRAM: Selected device family does not support this module.

I also tried to change the device family, but it still lists the MAX II device. Why is this happening? How can I implement UART functionality on the MAX II series?

Is there an alternative method for UART communication on MAX II devices, or is the MAX II no longer supported for such functionality?

I would really appreciate your guidance. Looking forward to your positive response.

[ShengN_Intel]

Hi,

Since I use the embedded peripherals on MAX 10 to showcase, MAX II not support some of the embedded peripherals so you may remove those peripherals and just use the UART verilog code.

Change device is under Device tab not Board tab.

Thanks,

Regards,

Sheng

[Thiru_N]

Hi @ShengN_Intel ,

I have already changed the device name to the one you mentioned, and I have added a reference image. However, I am still encountering the issue. Is there any other sample source code available for the UART, SPI, or I2C for the MAX II?

[ShengN_Intel]

Hi,

Yes, MAX II don't support some of the embedded peripheral. However you just need the UART verilog code. You can create a new MAX II project and include these 3 files impl_top.v, uart_rx.v and uart_tx.v from this link https://github.com/ben-marshall/uart/tree/master/rtl (I had verify the functionality)

If you want to run that design, you'll need to change to device MAX 10 with name 10M50DAF484C6GES

Thanks,

Regards,

Sheng

[ShengN_Intel]

Hi,

May I know do you have any further concern or consideration?

Thanks,

Regards,

Sheng