Help with Filters and DE2 board

[Altera_Forum]

As part of a porject, i'm expected to do this design a simple low-pass filter, using the Fdesign tool in matlab. then generate a VHDL file and test bench to simulate in modelsim/Quartus. 

  The final step is to test the low-pass filter on the DE2 board.  The first 2 steps are done. the final step is the problem. i don't know how to test this on the DE2 board. how do i know it actually works. how can i visibly test the design on the DE2 board to make sure it works (E.G make some LEDs flash, something of that nature) ANY HELP WILL BE GREATLY APPRECIATED.

[Altera_Forum]

--- Quote Start ---  As part of a porject, i'm expected to do this design a simple low-pass filter, using the Fdesign tool in matlab. then generate a VHDL file and test bench to simulate in modelsim/Quartus.   The final step is to test the low-pass filter on the DE2 board.  The first 2 steps are done. the final step is the problem. i don't know how to test this on the DE2 board. how do i know it actually works. how can i visibly test the design on the DE2 board to make sure it works (E.G make some LEDs flash, something of that nature) ANY HELP WILL BE GREATLY APPRECIATED.  --- Quote End ---  You could create an SOPC system containing a dual-ported RAM data source, a dual-ported RAM data sink, a small FSM to enable source/sink address counters and produce a 'done' status, and control logic (a processor or JTAG Avalon-MM master). One port of the RAMs would connect to your control logic, while the other would connect across your filter component.  Use the control logic to fill the source RAM with samples, eg., sinusoid or noise, then enable the logic so that the source samples pass through your filter to the sink RAM. Poll your status bit to determine when the source samples have all reached the sink RAM. Read out the sink RAM samples and calculate their power spectrum.  The incoherent average of filtered noise samples will have a response that matches the FIR filter response.  Cheers, Dave