How can I make the least skew between data_in port and all registers it feeds?

[AGoge]

I have to get the least skew between 1bit data_in port and all registers it feeds. I've tried to include "set_max_skew" to the SDC file but everything became even worse. In case when I used single receiver channel satisfying result was reached by option "lock region", but using this way to make good skew for 24 channels doesn't seem possible.

[MuhammadAr_U_Intel]

Hi,

set_max_skew is the constraint to specify maximum allowable skew between paths.

Did you compared the skew before and after the constrain in Timing Analyzer using "Report Max Skew" ?

https://www.intel.sg/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-qpp-timing-analyzer.pdf

Page 65

Topic: 2.2.7.2. Maximum Skew (set_max_skew)

Another thing you might want to try remove the location constraint for the Input pins to give fitter more flexibility to achieve better skew.

Thanks,

Arslan

[AGoge]

Thanks for your reply.

I checked the skew by using a comand "report path" and my calculating the differece. I know that constrain skew is achieveble, but when I use "set_max_skew" the result of actual skew is worse than without any constrains. Here I have a small experement with this thing https://drive.google.com/open?id=1XC4QK_nwmswpdUEPY9IS4_woeTTtOxiL . Screenshots and some additional info in PDF and some instructions in readme.txt file. Also there's the project in this folder.