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In my design I’m able to do master transfers to OCM(starting at address 0x00000000) and verify that data from the HPS by using the HPS2FPGA off set at (0x80000000). If I master the same data to the FGPA2HPS directly how can I verify this data? Which location in the HPS would I have to read?
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Hi ap_mercy,
The OCM is on the FPGA side, sorry that I may not know understand correctly what you are trying to do.
I think is not possble to master transfer your data to the FPGA2HPS directly and verify the data....
Maybe you can share more details in a diagram in order to have a better picture.
Thanks.
Regards,
Aik Eu
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Hi ap_mercy,
We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.
Thanks.
Regards,
Aik Eu

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