How does RAM initialization *physically* work?

[Altera_Forum]

I understand how to initialize RAM from a .MIF with the Mega tool, I just don't understand how it works at a transistor level. Does the RAM have a property where it can initialize to a set value on Reset or another signal? Do LEs get used and act as a ROM that initializes the RAM? 

 Thanks.

[Altera_Forum]

During the FPGA configuration phase, the FPGA configuration hardware will address and write the relevant data from the configuration bitstream into the RAM blocks. 

There's no set/reset signal for the RAM blocks and there's no other storage of the RAM initial values within the FPGA. Even if you use the device wide reset (DEV_CLRn), it will only reset the flip-flops, it won't (can't) reset the RAM block contents.

[Altera_Forum]

--- Quote Start ---  Does the RAM have a property where it can initialize to a set value on Reset or another signal? Do LEs get used and act as a ROM that initializes the RAM?  --- Quote End ---   Initialized FPGA internal block RAM and ROM are the same thing. But initialization is only possible from the configuration bitstream during initial configuration, it can't be triggered by another signal than NCONFIG.

[Altera_Forum]

Ahhhhh, so the answer is "neither" -- the RAM is just initialized from the bitstream, no special RAM properties, no use of LEs. That makes sense, thank you!