Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Connectivity with the SPI interface to MAX II CPLD

Altera_Forum
Honored Contributor II
‎02-22-2013 09:41 PM
1,162 Views

Normaly the JTag interface is used to program and control the CPLD. 

Can I use the SPI interface to do the same thing ??? 

Cpld EPM570T144C4. 

I beleve the SPI interface is only used for talking to peripherals, like SD memory devices. Not other controling (master) micro-processors.  

Thanks Mark. A current customer.
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Altera_Forum
Honored Contributor II
‎02-22-2013 09:51 PM
423 Views

There's no dedicated SPI interface in MAX II, any SPI functionality has to be implemented in logic elements. Master and slave interfaces are both feasible, but they won't be available for CFM (configuration flash memory) programming, which can be only done through JTAG pins. UFM is accessible through user logic, however.

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