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My Problem I make verilog program counter in quartus I want increase counter after one secound I use de2 board and used clock_50 in generarte clock but very high speed I wand any etting in quartus to setting clock at one secod any one help me I'm very thank you.
Please I'm very very very needly to this is idea.Link Copied
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in order to avoid clock issues, the easiest way is incrementing the counter every 50E6 cycles of the 50 MHz clock, this can be achieved using a 26 bits (ceil(log2(50e6-1))) preescaler.
always@(posedge clk_50 or negedge reset_n)
begin
if(!reset_n)
begin
counter_out <= 0;
counter_preescaler <= 0;
end
else
begin
if(counter_preescaler == 49999999 )
begin
counter_out <= counter_out+1;
counter_preescaler <= 0;
end
else
counter_preescaler <= counter_preescaler+1;
end
end
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