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How to Enable I/O Input Register?

Altera_Forum
Honored Contributor II
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Hi, 

 

I have a design with a bus + clock. I want to minimize the delay so I set the option to use Fast Input Registers for the bus. 

But when i went ahead and compile, I checked the Compile Report -> Fitter -> Resource Section -> Input Pins, for the bus pins, the Input Register column shows "no". 

 

Any idea why? 

How can I enable the Input Register for Input I/Os? 

 

Thanks!
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Altera_Forum
Honored Contributor II
598 Views

The recommended way is to use a timing constraint on the input, mainly because you should do this anyway, and the fitter will automatically use the I/O cell if it needs to. 

That being said, there's nothing wrong with the Fast Input Register assignment to force it. The only reason I can think of is it physically can't do it. Some reasons would be: 

- Combinatorial logic between input and register 

- Register has control signals the I/O doesn't have 

- Register is driven by a clock that doesn't intersect with the I/O, such as a Regional on the other side of the device 

- Device doesn't have input registers in the I/O cell, like Cyclone III. (It has a fast connection to LAB and achieves similar timing). 

I believe I've seen error messages when this assignment doesn't take, so look for those, but these might be some other reasons to look at it.
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Altera_Forum
Honored Contributor II
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Thanks. 

I figured out the reason why it's not doing it. We usually have a top level vhd file for the pins only, then put everything else in a level under. For Quartus to implement the Input Registers, it seems like you need to put the register logic right at the top of the pin .vhd file, otherwise it won't work. Weird, but glad it's working now. Thanks.
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Altera_Forum
Honored Contributor II
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The register could be many hierarchies down, and as long as it's a direct connection it should go into the I/O cell. It's working though, so I understand if you don't investigate further.

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Altera_Forum
Honored Contributor II
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That's what I thought in the beginning, and couldn't figure out why. But with everything else the same, and I just moved the registers to the top pin level, then it works. 

 

Doesn't really make sense to me since the compiler should be able to figure it out, but that's how it is right now.
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