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How to configure DDR SDRAM on NEEK

Altera_Forum
Honored Contributor II
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Hello everyone: 

 

I had built a simple system on NEEK with SOPC.When I ran the hello world program on NIOSII IDE,no error or warning.But "Hello from NiosII" didn't show in the console window.While I changed the Program memory,Read-only data memory ,Read/write data memory ,Heap memory and stack memory in "System Library properties"of NiosII IDE from DDRSDRAM to SSRAM which is included in my system,the Hello world program could work. 

When I compile the system in quartus ,the .sof file is time-limited due to the DDR SDRAM ip. 

So I am confusing about which part causes the problem.the ip or the configuration of DDR SDRAM. 

 

My English is not very good,and thank you for check my problem.
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Altera_Forum
Honored Contributor II
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Once you configure your FPGA with the SOF file, you will have an alert window saying that you are in time limited mode because of the lack of license. You mustn't close this window! If you do the DDR controller will stop working. Maybe this is your problem...

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Altera_Forum
Honored Contributor II
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Hi Daixiwen: 

Thank you very much.The problem is solved now.Thanks again.
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