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Hi all,
I am using arria 10 SOC (10AS048H3F34I2SG) to capture data from 12 bit afe5801 ADC. The data is in lvds standard coming in double data rate. The ADC output has a frame clock running at 64 Mhz and a data clk at 384 Mhz ( 6 x 64 Mhz) . The data has to be captured at 384 Mhz in double data rate.
As LVDS serdes block does not support 12 bits or the DDIO functionality. Also the Altera GPIO cannot be used as it is LVDS standard and the interface frequency is above 300Mhz. Please advise on how to correctly sample the data
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Hi ,
May I know, what exactly restriction, when using the Altera LVDS IP.
Regards,
Rs

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