I have the source code of a design and the bitstream and I have to make sure they are related. I was wondering if with Quartus II (v14.1) there is a verification function.
At first I thought that the checksum would be the same if the same design was compiled n times, but every time I compile the design, the checksum is different.
Thanks in advance for any answer,
- Cyclone® IV FPGAs
Refer the 'Verifying if Programming Files Correspond to a Compilation of the Same Source Files' from the link below,
let me know, how it works for Quartus II(v14.1).