I need to work with SEU in Arria 10.
I've installed EMR Unloader IP in my design and it works as expected.
I can make changes in EMR through JTAG (in-system sources and probes).
The problem is that I can't manage CRC_Error pin through JTAG. This is required to debug the external logic intended for SEU mitigation.
When I make changes to EMR through JTAG, CRC_ERROR pin remains low.
Please say, what can I do to manage CRC_ERROR pin? Best way is to change it syncronously with EMR.
I have no dedicated license for SEU IPs, so Fault injection IP and so on SW are not available for me.
Thank you in advance for any help.
In order to test the CRC_ERROR pin you do require to use the Fault Inject debugger together with the Fault Injection IP. There is no method that you can inject the error via JTAG.
If you have Quartus Prime Standard license, you can try to check within the Self Service License Center submit the Contact Customer Service form at:
Otherwise contact your local Intel FPGA sales representative for the Fault Inject IP license.