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--- Quote Start --- sorry kaz . i didn't undersatand that .if you remember that distance is output ,i make a signal instead of output but it every clk increment the accum. could you plz illustrate. --- Quote End --- You can have copy of your output before it escapes as internal signal or you can leave it as it is and use a module for summing. either way the signal vout that I posted sometime ago is now handy to indicate a sample is active since output data may stay for many clocks.
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hi kaz
it is working now very good, but there is another problem if distance =1 and the following distance=1 the sumulator mix them i.e distance =1 only for the two value then accumulator consider them =1 instead of 2. sorry for my bad english but i hope y understand me- Mark as New
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sorry kaz,
it is fixed now and worked very well.and i add counter to count the number of input data,but if i want to check if the last output counter is even or odd . i.e the last value of counter if even do some thing or odd do another job.- Mark as New
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--- Quote Start --- sorry kaz, it is fixed now and worked very well.and i add counter to count the number of input data,but if i want to check if the last output counter is even or odd . i.e the last value of counter if even do some thing or odd do another job. --- Quote End --- that is simple. if lsb of count is '0' it is even, if it is '1' it is odd.
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yes i make this ,but i mean if i want to catch the last output only to make division on it .how can i do that
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and it gave me error when divided by zero.
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sorry kaz ,
but i need your really help counter count the number of input samples then the counter output (n) and i want to check if the numbers of samples is even do that (n*n) or if odd make that ((n*n)-1). (dis) signal will have values as (1,6,9,8,.....100) and the second signal (n) will have values as (0,2,8,9.......,200) and i want to fetch the two last outputs from the two signal (100,200) and divide 100/200.how can i write it in vhdl and how can overcome the divide by zero error. i want help plz.- Mark as New
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hi kaz
i need your help ,plz if you remember the design you made before that measure the distance between two samples d(s1,s2). if i have 4 samples such as [ s1,s2,s3,s4 ] and i want to get the distances between every two samples, then i would have d(s1,s2),d(s1,s3),d(s1,s4),d(s2,s3),d(s2,s4)and d(s3,s4). what should i do 1 or 2 1- should i repeat the module of test 6 times and i would have 6 component of that module connecting together to get the 6 distances between every sample and the other ...or 2- should i use the module of test one time and store the distance in register and reset the module then measure the distance between the next two samples and store the the result in another register again and so on.... what can i do ?? so really i need your advice thanks a lot and i hope you answer this time!!!- Mark as New
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--- Quote Start --- hi kaz i need your help ,plz if you remember the design you made before that measure the distance between two samples d(s1,s2). if i have 4 samples such as [ s1,s2,s3,s4 ] and i want to get the distances between every two samples, then i would have d(s1,s2),d(s1,s3),d(s1,s4),d(s2,s3),d(s2,s4)and d(s3,s4). what should i do 1 or 2 1- should i repeat the module of test 6 times and i would have 6 component of that module connecting together to get the 6 distances between every sample and the other ...or 2- should i use the module of test one time and store the distance in register and reset the module then measure the distance between the next two samples and store the the result in another register again and so on.... what can i do ?? so really i need your advice thanks a lot and i hope you answer this time!!! --- Quote End --- option 2 looks better. once you have s1/s2, s2/s3,s3/s4 distances then you can just add up as required e.g s1/s3 = sum of first two , s1/s4 = sum of all three
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sorry kaz ,but what do you mean by s1/s3 = sum of first two , s1/s4 = sum of all three the distances will not be order.
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