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How to simulate serdes in modelsim? Which files must I compile?

Altera_Forum
Honored Contributor II
‎07-01-2010 10:06 AM
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How to simulate serdes in modelsim? 

Which files must I compile?
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Altera_Forum
Honored Contributor II
‎07-02-2010 02:36 PM
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If it's the LVDS serdes, I think you just need the "altera_mf.v" libraries 

c:\altera\91\quartus\eda\sim_lib 

 

If it's the GX transceivers, you need the library for the corresponding device you are using also located in the above folder. 

 

Jake
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Altera_Forum
Honored Contributor II
‎07-05-2010 02:50 AM
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I complied the foloowing files in the eda/sim_lib file folder: 

"arriagx_hssi_atoms.v"  

"220model.v"  

"altera_mf.v"  

"altera_primitives.v"  

"arriagx_atoms.v" 

 

when simulate , the system give me the following error message: 

# ** Error: (vsim-3033) I:/0623/FPGA_75M/IPCORE/xcvr_s16.v(203): Instantiation of 'alt2gxb' failed. The design unit was not found.# Region: /testbench_trx/RX/b2v_inst6# Searched libraries:# work  

 

I compiled the quartus/libraries/megafunctions/alt2gxb.v 

vlog -reportprogress 300 -work work D:/altera/90/quartus/libraries/megafunctions/alt2gxb.v# Model Technology ModelSim SE vlog 6.2b Compiler 2006.07 Jul 31 2006# -- Compiling module alt2gxb# -- Compiling module nfts_recovery_ip# -- Compiling module electrical_idle_detector# -- Compiling module ltd_counter# -- Compiling module ltr_ltd_fsm# -- Compiling module wait_counter# -- Compiling module nfts_os_detector 

 

simulate, it gives the error message: 

 

# ** Error: (vsim-3033) D:/altera/90/quartus/eda/sim_lib/stratixiigx_hssi_atoms.v(22225): Instantiation of 'oper_add' failed. The design unit was not found.# Region: /testbench_trx/TX/b2v_inst6/alt2gxb_component/channel_rec[0]/genblk1/genblk6/receive/digi_rx_1/comp_chnl_top_1# Searched libraries:# work# ** Error: (vsim-3033) D:/altera/90/quartus/eda/sim_lib/stratixiigx_hssi_atoms.v(22237): Instantiation of 'oper_add' failed. The design unit was not found.# Region: /testbench_trx/TX/b2v_inst6/alt2gxb_component/channel_rec[0]/genblk1/genblk6/receive/digi_rx_1/comp_chnl_top_1# Searched libraries:# work# ** Error: (vsim-3033) D:/altera/90/quartus/eda/sim_lib/stratixiigx_hssi_atoms.v(22249): Instantiation of 'oper_add' failed. The design unit was not found.# Region: /testbench_trx/TX/b2v_inst6/alt2gxb_component/channel_rec[0]/genblk1/genblk6/receive/digi_rx_1/comp_chnl_top_1# Searched libraries:# work# ** Error: (vsim-3033) D:/altera/90/quartus/eda/sim_lib/stratixiigx_hssi_atoms.v(22261): Instantiation of 'oper_add' failed. The design unit was not found.# Region: /testbench_trx/TX/b2v_inst6/alt2gxb_component/channel_rec[0]/genblk1/genblk6/receive/digi_rx_1/comp_chnl_top_1# Searched libraries:# work# ** Error: (vsim-3033) D:/altera/90/quartus/eda/sim_lib/stratixiigx_hssi_atoms.v(22273): Instantiation of 'oper_add' failed. The design unit was not found.# Region: /testbench_trx/TX/b2v_inst6/alt2gxb_component/channel_rec[0]/genblk1/genblk6/receive/digi_rx_1/comp_chnl_top_1# Searched libraries:# work# ** Error: (vsim-3033) D:/altera/90/quartus/eda/sim_lib/stratixiigx_hssi_atoms.v(22285): Instantiation of 'oper_add' failed. The design unit was not found.# Region: /testbench_trx/TX/b2v_inst6/alt2gxb_component/channel_rec[0]/genblk1/genblk6/receive/digi_rx_1/comp_chnl_top_1# Searched libraries:# work# ** Error: (vsim-3033) D:/altera/90/quartus/eda/sim_lib/stratixiigx_hssi_atoms.v(22297): Instantiation of 'oper_add' failed. The design unit was not found.# Region: /testbench_trx/TX/b2v_inst6/alt2gxb_component/channel_rec[0]/genblk1/genblk6/receive/digi_rx_1/comp_chnl_top_1# Searched libraries:# work# ** Error: (vsim-3033) D:/altera/90/quartus/eda/sim_lib/stratixiigx_hssi_atoms.v(22309): Instantiation of 'oper_add' failed. The design unit was not found.# Region: /testbench_trx/TX/b2v_inst6/alt2gxb_component/channel_rec[0]/genblk1/genblk6/receive/digi_rx_1/comp_chnl_top_1# Searched libraries:# work# ** Error: (vsim-3033) D:/altera/90/quartus/eda/sim_lib/stratixiigx_hssi_atoms.v(22318): Instantiation of 'oper_decoder' failed. The design unit was not found.# Region: /testbench_trx/TX/b2v_inst6/alt2gxb_component/channel_rec[0]/genblk1/genblk6/receive/digi_rx_1/comp_chnl_top_1# Searched libraries:# work# ** Error: (vsim-3033) D:/altera/90/quartus/eda/sim_lib/stratixiigx_hssi_atoms.v(22325): Instantiation of 'oper_decoder' failed. The design unit was not found.# Region: /testbench_trx/TX/b2v_inst6/alt2gxb_component/channel_rec[0]/genblk1/genblk6/receive/digi_rx_1/comp_chnl_top_1# Searched libraries:# work# ** Error: (vsim-3033) D:/altera/90/quartus/eda/sim_lib/stratixiigx_hssi_atoms.v(22332): Instantiation of 'oper_decoder' failed. The design unit was not found.# Region: /testbench_trx/TX/b2v_inst6/alt2gxb_component/channel_rec[0]/genblk1/genblk6/receive/digi_rx_1/comp_chnl_top_1# Searched libraries:# work# ** Error: (vsim-3033) D:/altera/90/quartus/eda/sim_lib/stratixiigx_hssi_atoms.v(22339): Instantiation of 'oper_decoder' failed. The design unit was not found.# Region: /testbench_trx/TX/b2v_inst6/alt2gxb_component/channel_rec[0]/genblk1/genblk6/receive/digi_rx_1/comp_chnl_top_1# Searched libraries:# work# ** Error: (vsim-3033) D:/altera/90/quartus/eda/sim_lib/stratixiigx_hssi_atoms.v(22346): Instantiation of 'oper_decoder' failed. The design unit was not found.# Region: /testbench_trx/TX/b2v_inst6/alt2gxb_component/channel_rec[0]/genblk1/genblk6/receive/digi_rx_1/comp_chnl_top_1# Searched libraries:# work# ** Error: (vsim-3033) D:/altera/90/quartus/eda/sim_lib/stratixiigx_hssi_atoms.v(22353): Instantiation of 'oper_decoder' failed. The design unit was not found.# Region: /testbench_trx/TX/b2v_inst6/alt2gxb_component/channel_rec[0]/genblk1/genblk6/receive/digi_rx_1/comp_chnl_top_1# Searched libraries:# work# ** Error: (vsim-3033) D:/altera/90/quartus/eda/sim_lib/stratixiigx_hssi_atoms.v(22360): Instantiation of 'oper_decoder' failed. The design unit was not found.# Region: /testbench_trx/TX/b2v_inst6/alt2gxb_component/channel_rec[0]/genblk1/genblk6/receive/digi_rx_1/comp_chnl_top_1# Searched libraries:# work# ** Error: (vsim-3033) D:/altera/90/quartus/eda/sim_lib/stratixiigx_hssi_atoms.v(22367): Instantiation of 'oper_decoder' failed. The design unit was not found.# Region: /testbench_trx/TX/b2v_inst6/alt2gxb_component/channel_rec[0]/genblk1/genblk6/receive/digi_rx_1/comp_chnl_top_1# Searched libraries:# work# ** Error: (vsim-3033) D:/altera/90/quartus/eda/sim_lib/stratixiigx_hssi_atoms.v(22374): Instantiation of 'oper_decoder' failed. The design unit was not found.# Region: /testbench_trx/TX/b2v_inst6/alt2gxb_component/channel_rec[0]/genblk1/genblk6/receive/digi_rx_1/comp_chnl_top_1# Searched libraries:# work# ** Error: (vsim-3033) D:/altera/90/quartus/eda/sim_lib/stratixiigx_hssi_atoms.v(22381): Instantiation of 'oper_decoder' failed. The design unit was not found.# Region: /testbench_trx/TX/b2v_inst6/alt2gxb_component/channel_rec[0]/genblk1/genblk6/receive/digi_rx_1/comp_chnl_top_1# Searched libraries:# work# ** Error: (vsim-3033) D:/altera/90/quartus/eda/sim_lib/stratixiigx_hssi_atoms.v(22388): Instantiation of 'oper_decoder' failed. The design unit was not found.# Region: /testbench_trx/TX/b2v_inst6/alt2gxb_component/channel_rec[0]/genblk1/genblk6/receive/digi_rx_1/comp_chnl_top_1# Searched libraries: 

.......... 

 

.........and there are also many error messages , for the space limited, I cannot list all of them. 

 

perhaps some of the files i have not compiled . which files , i am appreciative if some one can give me some advices.
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Altera_Forum
Honored Contributor II
‎07-05-2010 02:50 PM
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1 - Look at the "EDA" tab of your alt2gxb megawizard. It will tell you exactly what you need for simulation. 

2 - I believe you need to have the megawizard generate a simulation model for you (a .vo file). 

 

So, are you using Arria GX or Stratix II GX? 

 

Jake
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Altera_Forum
Honored Contributor II
‎07-06-2010 01:36 AM
2,172 Views

using ArriaGX series. 

thank you . let me try.
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Altera_Forum
Honored Contributor II
‎07-06-2010 05:17 AM
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i have generate the file: 

xcvr_s16.vo 

and compiled it , simulate, give me the following error message. 

 

vsim -vopt work.testbench_trx 

 

# vsim -vopt work.testbench_trx # ** Note: (vsim-3812) Design is being optimized...# ** Error: D:/altera/90/quartus/eda/sim_lib/arriagx_hssi_atoms.v(45614): Module 'oper_mux' is not defined. 

# ** Error: D:/altera/90/quartus/eda/sim_lib/arriagx_hssi_atoms.v(47374): Module 'oper_less_than' is not defined. 

# ** Error: D:/altera/90/quartus/eda/sim_lib/arriagx_hssi_atoms.v(22177): Module 'oper_add' is not defined. 

 

# ** Error: D:/altera/90/quartus/eda/sim_lib/arriagx_hssi_atoms.v(22395): Module 'oper_decoder' is not defined. 

# ** Error: D:/altera/90/quartus/eda/sim_lib/arriagx_hssi_atoms.v(10417): Module 'oper_decoder' is not defined. 

 

# ** Error: D:/altera/90/quartus/eda/sim_lib/arriagx_hssi_atoms.v(12996): Module 'oper_mux' is not defined. 

 

 

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Altera_Forum
Honored Contributor II
‎11-11-2010 07:25 AM
2,172 Views

oper_add etc is defined in the sgate lib, found under quartus/eda/sim_lib/ 

 

Compile that into your design to get rid of those errors.
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