How to use SDRAM on DE2 board?

[Altera_Forum]

Hi, 

 I am working on a school project, and I am using FPGA to control a DAC(digital to analog converter) and a ADC (analog to digital converter) with SPI protocol.  Basically, I looked at the timing diagram of these two chips, and then I wrote Verilog and upload them into the FPGA. So, I got this part done. My FPGA can send binary codes to DAC, however, I have a huge lookup table which contains 2^16 of 16-Bit of binary codes need to send to DAC. So I think I will need to use SDRAM to store this lookup table. I did some search, and I found I can use DE2 control panel to upload my lookup table into the SDRAM, I tried it and it worked.   My question is, as I use DE2 control panel to upload my lookup table into SDRAM, and FPGA is ready to send binary codes to DAC, how can I let my verilog program  access these binary codes inside of SDRAM, and send them out? There are some people suggested to build a memory controller with Qsys, but I am not quite sure how does it work. So any help would be appreciated!  Thanks, Tao

[Altera_Forum]

All the development boards, including all the DE2 variants, come with a number of example projects. Between them these typically make use of all the peripherals available on the board. One or more will include an SDRAM controller and, more than likely, will be captured as part of a Qsys (or possibly SOPC builder, Qsys' predecessor) system. 

 So, open one of these projects and explore it. I'm sure you'll learn a lot through this.  You can then consider using one of the example projects as a starting point for your own. Copy the project, open it up in Qsys and, if you're keen, remove all the peripherals you don't need. (If you're keen - arguably there's no need to do this. In your project you can simply ignore those peripherals you don't need.) Note: these examples will typically implement a Nios. If that's what you want, so much the better.  Which DE2 board variant are you using? Most also come with SRAM which, if you're intending to access directly from your own rtl, would be easier. If you're hoping to access the SDRAM directly from your own rtl then you will have to get to grips with the Avalon Slave interface. This interface offers you the on-chip interface (to your own rtl) from Altera's SDRAM interface IP. This presents an easy interface for you to connect your logic to. Look through chapter 2 - "sdram controller core" of the "embedded peripherals ip user guide (https://www.altera.com/literature/ug/ug_embedded_ip.pdf)".  Cheers, Alex