How to use WYSIWYG primitive cycloneive_crcblock in EP4CE55F23I7?

[taleunicorn]

Recently, I want to analyze the SEU flip in the CRAM of the cyclone4 chip. I instantiated the cycloneive_crcblock primitive in my project, and the whole project synthesis successfully. But when I want to grab these input and output signals (shiftnld, ldsrc, crcerror, regout) in primitives in SingalTap, I find that these signals are not found at all. However I can find the signal named after this primitive block instantiation in SignalTap.  For example, I named this primitive instantiation 'Cramdetection', and I can find a single bit signal called 'Cramdetection.

So I want to know how can I find these signals in SignalTap, such as shiftnld, ldsrc, crcerror and regout? In addition, I would like to know what is the meaning of the signal Cramdetection, is it equivalent to the signal crcerror? Is there any way to judge in user logic that this primitive is working?

That's all my questions, thanks all.

[ShengN_Intel]

Hi,

Go to new instance -> add nodes -> node finder -> search for * -> list and you should see all the available signals. I don't think Cramdetection is equivalent to the signal crcerror because it's just a given block name. As for user logic you may check this link https://www.macnica.co.jp/business/semiconductor/support/faqs/intel/139528/

Best Regards,

Sheng

p/s: If any answer from community or Intel support are helpful, please feel free to mark as solution and give Kudos.

[ShengN_Intel]

Hi,

May I know any further update or concern?

Thanks,

Regards,

Sheng

[ShengN_Intel]

Since there are no further feedback for this thread, I shall set this thread to close pending. If you still need further assistance, you are welcome reopen this thread within 20days or open a new thread, some one will be right with you.