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I tried to implement the following code, copied from Page 37 of the ALTERA Verilog manual:
module compinst (data,clock,clearn,presetn,a,b,c,gn,d,q_out,y,wn); input data,clock,clearn,presetn,a,b,c,gn; input [3:0]d; output q_out,y,wn; dff dff1 (.d (data),.q(q_out),.clk(clock),.clrn(clearn),.prn(presetn)); a_74151b mux (c,b,a,d,gn,y,wn); endmodule When I compile the code, I get the following error message: Error: Node instance "mux" instantiates undefined entity "a_74151b" Being a novice, I would appreciate explanation and correction of the error. I am using Quartus II. AndrewLink Copied
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You have two 'entities' instantiated in the code for your 'compinst' module. They are modules called 'dff' and 'a_74151b'.
Quartus can find the code that describes how 'dff' works but doesn't know where to find the code for 'a_74151b'. You need to add a path to the project telling Quartus where to find that code. With your project open, goto: 'Project' -> 'Add/Remove Files in Project...'. Locate the module via the browser button and add it to the project. If you're still having problems perhaps you can identify which 'ALTERA Verilog manual' you're looking at. Regards, Alex- Mark as New
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Thanks Alex. One more question: where does one find a tutorial or some explanation on how to use the state diagram feature?
Andrew- Mark as New
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Not sure how many still remember 74xxx series TTL components that were popular till late 90's.
74151 is one of those. They are relatively primitive to implement functions needed nowadays. You may want to create an RTL model of it, which probably only a few lines instead of going through the trouble looking for the library.- Mark as New
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The TTL line is still very popular in schools, particularly community colleges, because it is cheap. Furthermore, you can use the family to teach digital design easily. In several cases, ECL is still being used commercially. For example, you use the 7490 to teach what a counter does not how to use it commercially.
Andrew- Mark as New
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The said 74xx components are part of the maxplus2 library. You'll find it under quartus\libraries\others\maxplus2
You'll notice that the components are present either as AHDL (*.tdf) or Block Editor (*.bdf) files. The respective Verilog module definition (a_74151b) used in the old MaxPlus Verilog manual example is apparently no longer available by default in Quartus, but you can access it by adding quartus\libraries\vhdl\altera\maxplus2.vhd to your design.- Subscribe to RSS Feed
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