Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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I have been trying to get to support for some time now. I have questions about what to do with GND+ pins in EPM7128slc84-15 devices. What happens if the pins are left open.

BNard
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ak6dn
高評価コントリビューター III
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Pins 7,19,32,42,47,59,72,82 are all hard GND in that package and must be grounded.

Not exactly sure what you mean by GND+, but if you are referring to UNUSED OUTPUTS DRIVING LOW you can leave those unconnected if so desired, or connect to test pads so you could possibly use those at some future time (in an ECO or test mode, for example).

 

BNard
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GND+ is the MAX software output file for the .pin file and says these must be connected to gnd. I have been getting some of these devices with large current draws on certain power pins. Can this be from electrostatic/emi damage to the cpld itself? That prompted my question about what happens if left open?

ak6dn
高評価コントリビューター III
740件の閲覧回数

OK, I checked the .pin output file for my design (happens to use the exact same part) in QuartusII 13.0sp1. Here is the relevant comment:

--------------------------------------------------------------------------------- -- NC : No Connect. This pin has no internal connection to the device. -- DNU : Do Not Use. This pin MUST NOT be connected. -- VCC : Dedicated power pin, which MUST be connected to VCC. -- VCCIO : Dedicated power pin, which MUST be connected to VCC -- of its bank. -- GND : Dedicated ground pin. Dedicated GND pins MUST be connected to GND. -- It can also be used to report unused dedicated pins. The connection -- on the board for unused dedicated pins depends on whether this will -- be used in a future design. One example is device migration. When -- using device migration, refer to the device pin-tables. If it is a -- GND pin in the pin table or if it will not be used in a future design -- for another purpose the it MUST be connected to GND. If it is an unused -- dedicated pin, then it can be connected to a valid signal on the board -- (low, high, or toggling) if that signal is required for a different -- revision of the design. -- GND+ : Unused input pin. It can also be used to report unused dual-purpose pins. -- This pin should be connected to GND. It may also be connected to a -- valid signal on the board (low, high, or toggling) if that signal -- is required for a different revision of the design. -- GND* : Unused I/O pin. Connect each pin marked GND* directly to GND -- or leave it unconnected. -- RESERVED : Unused I/O pin, which MUST be left unconnected. -- RESERVED_INPUT : Pin is tri-stated and should be connected to the board. -- RESERVED_INPUT_WITH_WEAK_PULLUP : Pin is tri-stated with internal weak pull-up resistor. -- RESERVED_INPUT_WITH_BUS_HOLD : Pin is tri-stated with bus-hold circuitry. -- RESERVED_OUTPUT_DRIVEN_HIGH : Pin is output driven high. -- NON_MIGRATABLE: This pin cannot be migrated. ---------------------------------------------------------------------------------  

So GND+ is just an unused input pin. On that device in that package I see no pins flagged as GND+ or GND* in my .pin listing (I use all the I/Os available).

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