The datasheet says "For more information about the high-speed and low-speed I/O performance pins, refer to the respective device pin-out files.". The pin-out files only refer to "high speed" and "low speed" pins. I need the actual toggle rate.
We appreciate your request and using this new forum. Unfortunately, Intel PSG no longer publish the value of toggle rate externally since few years back. All of the standard supported I/O signaling frequencies is depended on design and also system customization form factors.
Therefore, the I/O toggle rate specifications was being removed from Max 10 device data sheets. For your case, the best options is using HSPICE or IBIS simulations.
You can refer to full IBIS Models for Intel® Devices as captured in below link:
Hope this helps.
Intel Customer Support
First, I'm happy that Altera/Intel people are monitoring this forum and providing useful information. This is an improvement over the old forum.
I'm frustrated/disappointed that I need to run simulations to get basic information, although I appreciate that the complexity of the devices has made this problematic. I now face the cost and learning curve of using yet another simulation tool. Can you recommend something for simple IBIS simulation?