I am using an EPCQ128 device to load configuration data to my 5CEFA7F23C8N device. When i create a *.jic file, i check "compress" in the file properties. During the programming (Quartus Programmer), i see that the erase cycle goes to 12%, but then the configure cycle goes to 13%. It seems that the erase cycle doesn't erase enough memory. The FPGA does not work after this programming. To workaround, I created a *.jic file that uses a non-compressed *.sof file. I use this *.jic only to erase the EPCQ device (the erase cycle goes up to 40%). After erasing, i can load my real *.jic file and then the FPGA works fine.
I just thought i should share, since this drove me crazy for about a month trying to figure out why my code was not working correctly.
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I use a compressed .jic file for my Cyclone V programming (EPCQ128). Here's what I found, I don't know if it will help you or not. When you create the .jic programming file, select EPCS (not EPCQ) as your programming device. This works for me, otherwise it fails as you describe.
I use a compressed .jic file for my Cyclone V programming (EPCQ128). Here's what I found, I don't know if it will help you or not. When you create the .jic programming file, select EPCS (not EPCQ) as your programming device. This works for me, otherwise it fails as you describe.
Hello GLees,
Thank you for your response. I will indeed try this when i release my next revision :)
If there is someone watching from Intel, please try to fix it in your next Quartus update so we do not have to use these workarounds.
Hi,
i tried with compressed and un compressed but no improvement.
i tried with EPCS and EPCQ but no improvement.
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