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Implement static RAMs using memory blocks of CycloneII EP2C5ST144C8N

CFabr1
Beginner
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Hi all,

I bought a cheap Cyclone II EP2C5T144 Dev Board to start with FPGA.Since I'm not yet familar with Verilog and VHDL I'm doing design with Quartus II block diagram simply translating my Kicad schematics (yes, I know it's not like writing code) .

 

I have now the need to implement some static 2K x 8-bit RAMs (like 6116 or compatible) using the memoty blocks of the CycloneII.I used the MegaWizard Plug-in Manager to create a 1-PORT RAM, this generated also the symbol but obviously it's based on registers hence synchronous (a clock is needed) while static RAMs are asynchronous (plus , they have /CE and /OE control lines that I cannot see in the Quartus II symbol).How can I handle this?To point out again that for now I'm only able to work on schematics block of Quartus II (version 12.1).Thanks in advance for any help/suggestion.

 

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1 Reply
RichardTanSY_Intel
140 Views

The Cyclone II M4K memory blocks do not support asynchronous memory, though they do support a pseudo-asynchronous read operation where the output data is available during the same clock cycle as when the read address is driven into it.


You can refer to below document for further information. 
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyc/cyclone_device_handb...

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